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Ȩ Ȩ > ¿¬±¸¹®Çå > Çмú´ëȸ ÇÁ·Î½Ãµù > Çѱ¹Á¤º¸Åë½ÅÇÐȸ Çмú´ëȸ > 2016³â Ãá°èÇмú´ëȸ

2016³â Ãá°èÇмú´ëȸ

Current Result Document :

ÇѱÛÁ¦¸ñ(Korean Title) TMS320C6678±â¹ÝÀÇ °í¼Ó Á÷·ÄÅë½Å¿ë SRIO backplane ±¸Çö
¿µ¹®Á¦¸ñ(English Title) High Speed Serial Communication SRIO Backplane Implementation for TMS320C6678
ÀúÀÚ(Author) ¿À¿ìÁø   ±è¾ç¼ö   °­¹Î¼ö   Woojin Oh   Yangsoo Kim   Minsoo Kang  
¿ø¹®¼ö·Ïó(Citation) VOL 20 NO. 01 PP. 0683 ~ 0684 (2016. 05)
Çѱ۳»¿ë
(Korean Abstract)
ÃÖ½ÅÀÇ °í¼º´É DSP³ª FPGA¿¡¼­´Â °í¼Ó Á÷·ÄÅë½ÅÀ¸·Î SRIO(Serial Rapid IO)¸¦ ä¿ëÇÏ°í ÀÖ´Ù. SRIO´Â ÃÊ°í¼Ó Á÷·Ä Åë½ÅÀÇ »ê¾÷ü Ç¥ÁØÀ¸·Î ÇöÀç Ver 3.1±îÁö Á¦Á¤µÇ¾î ÀÖÀ¸¸ç º» ¿¬±¸¿¡¼­´Â TI»çÀÇ DSP¸¦ ±â¹ÝÀ¸·Î 15Gbps±ÞÀ¸·Î Àü¼Û¼Óµµ¸¦ °®´Â BackplaneÀ» °³¹ßÇÏ¿´´Ù. À̸¦ ±â¹ÝÀ¸·Î °í¼Ó¿µ»óÀü¼Û µîÀÌ °¡´ÉÇϸç, ´ÙÁß DSP¸¦ ¿¬°áÇÏ¿© °í¼Ó ¿¬»ê¿¡ ÀûÇÕÇÑ scalableÇÑ ±¸Á¶·Î È®Àåµµ °¡´ÉÇÒ °ÍÀÌ´Ù. º» ³í¹®¿¡¼­´Â °í¼Ó Åë½Å¿¡ ÇÊ¿äÇÑ ¼³°è ±â¼úÀ» °ËÅäÇÏ°í ´ÙÁß ¿¬»ê ±¸Á¶¿¡ ´ëÇÏ¿© ³íÀÇÇÒ °ÍÀÌ´Ù.
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(English Abstract)
The up-to-date high-performance DSP or FPGA employs SRIO(Serial Rapid IO) as a high-speed serial communications. SRIO is an industry standard regulated upto Ver 3.1. In this study we developed a backplane having a transmission rate to 15Gbps based on a TI DSP. The back plane icould be used to High-speed video transmission, and will be adopted to connecting multiple DSPs for scalable architecture. This paper will discuss the design constraints for a high-speed communication and multiple-core operation.
Å°¿öµå(Keyword) SRIO   °í¼ÓÁ÷·ÄÅë½Å   Hyperlink   Backplane  
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