ÇѱÛÁ¦¸ñ(Korean Title) |
Ÿ¿ø°î¼± ¾ÏÈ£¸¦ À§ÇÑ GF(2163) ½ºÄ®¶ó °ö¼À±â |
¿µ¹®Á¦¸ñ(English Title) |
A GF(2163) scalar multiplier for elliptic curve cryptography |
ÀúÀÚ(Author) |
Á¤»óÇõ
½Å°æ¿í
Sang-Hyeok Jeong
Kyung-Wook Shin
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¿ø¹®¼ö·Ïó(Citation) |
VOL 13 NO. 01 PP. 0686 ~ 0689 (2009. 05) |
Çѱ۳»¿ë (Korean Abstract) |
º» ³í¹®¿¡¼´Â Ÿ¿ø°î¼± ¾ÏÈ£¸¦ À§ÇÑ ½ºÄ®¶ó °ö¼À±âÀÇ ¼³°è¿¡ ´ëÇØ ±â¼úÇÑ´Ù. ¼³°èµÈ ½ºÄ®¶ó °ö¼À±â´Â ½º¸¶Æ®Ä«µå Ç¥ÁØ¿¡ ±â¼úµÈ 163-ºñÆ®ÀÇ Å° ±æÀ̸¦ °¡Áø´Ù. À¯ÇÑü »ó¿¡¼ ½ºÄ®¶ó °ö¼ÀÀÇ ¿¬»ê·®À» ÁÙÀ̱â À§ÇØ complementary recoding ¹æ½ÄÀ» Àû¿ëÇÑ Non-Adjacent-Format(NAF) º¯È¯ ¾Ë°í¸®µëÀ» Àû¿ëÇÏ¿© ¼³°èÇÏ¿´´Ù. ¼³°èµÈ ½ºÄ®¶ó °ö¼À±â ÄÚ¾î´Â 0.35-§ CMOS ¼¿ ¶óÀ̺귯¸®·Î ÇÕ¼ºÇÏ¿© 32,768 °ÔÀÌÆ®·Î ±¸ÇöµÇ¾úÀ¸¸ç, 150-MHz@3.3-V·Î µ¿ÀÛÇÑ´Ù. ¼³°èµÈ ½ºÄ®¶ó ½Â»ê±â´Â ½º¸¶Æ®Ä«µå¿ë Ÿ¿ø°î¼± ¾ÏÈ£ Çϵå¿þ¾î ±¸ÇöÀ» À§ÇÑ IP·Î »ç¿ëµÉ ¼ö ÀÖ´Ù.
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¿µ¹®³»¿ë (English Abstract) |
This paper describes a scalar multiplier for Elliptic curve cryptography. The scalar multiplier has 163-bits key size which supports the specifications of smart card standard. To reduce the computational complexity of scalar multiplication on finite field , the Non-Adjacent-Format (NAF) conversion algorithm based on complementary recoding is adopted. The scalar multiplier core synthesized with a 0.35-§ CMOS cell library has 32,768 gates and can operate up to 150-MHz@3.3-V. It can be used in hardware design of Elliptic curve cryptography processor for smart card security.
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Å°¿öµå(Keyword) |
°ø°³Å° ¾ÏÈ£È
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Complementary recoding
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